A control source with one word of state: slew, lag, hold, edge, follower, delay, switch and probability as modes of one source #160

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opened 2026-10-06 16:24:14 +00:00 by bcox · 0 comments
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bcox asked on 2026-10-06 for a ticket for each gap docs/modular-gaps.md names without one, whether or not it is ever done. Engine claims are from reading the tree at 6a3fede9 on main. Nothing here is built, measured or listened to.

Summary

The matrix is stateless by ruling (dsp/mod_ops.h: anything that latches is a source), and the only stateful control blocks are the LFO and the envelope. docs/modular-gaps.md shows that a near-frozen LFO whose phase lane sums entries is a general control block with a slew limiter in it, and builds a slew limiter, an aux lane, an edge detector, an envelope follower, an audio trigger, an AR fired by any edge, a sequential switch and a Bernoulli gate on it, each at the cost of an LFO slot, several entries, a linear slope and a creep of about a quarter of full scale per 100 s. This ticket is the first-class form: one source kind in the shared list with a mode.

It would subsume #35 (slew), #117 (sample-and-hold) and #56 (a delayed copy), and the edge and follower pieces of #116 and #118.

What the tree has

  • Lfo::Modulation's phase lane and Slewed; kGreater, kAbsDifference, kMin, kMax, kMul and the polarity request on a source id.

The work, as a sketch

  • A ControlSource with an input (any source id), a mode, and one or two parameters: slew (rate or time), lag (one-pole), hold (sample on a clock source's edge), edge (pulse of a set width), follower (rectify and two-rate slew), delay (a short line), switch (N inputs stepped by a clock), probability (a hold compared against a threshold). Appended to the shared source list, two or four per layer.
  • The RTL cost is one word of state per instance, which is the point.

Open

Whether the modes are one enum on one kind, or separate kinds; how a clock input names its edge.

bcox asked on 2026-10-06 for a ticket for each gap `docs/modular-gaps.md` names without one, whether or not it is ever done. Engine claims are from reading the tree at `6a3fede9` on `main`. **Nothing here is built, measured or listened to.** ## Summary The matrix is stateless by ruling (`dsp/mod_ops.h`: anything that latches is a source), and the only stateful control blocks are the LFO and the envelope. `docs/modular-gaps.md` shows that a near-frozen LFO whose phase lane sums entries is a general control block with a slew limiter in it, and builds a slew limiter, an aux lane, an edge detector, an envelope follower, an audio trigger, an AR fired by any edge, a sequential switch and a Bernoulli gate on it, each at the cost of an LFO slot, several entries, a linear slope and a creep of about a quarter of full scale per 100 s. This ticket is the first-class form: one source kind in the shared list with a mode. It would subsume #35 (slew), #117 (sample-and-hold) and #56 (a delayed copy), and the edge and follower pieces of #116 and #118. ## What the tree has - `Lfo::Modulation`'s phase lane and `Slewed`; `kGreater`, `kAbsDifference`, `kMin`, `kMax`, `kMul` and the polarity request on a source id. ## The work, as a sketch - A `ControlSource` with an input (any source id), a mode, and one or two parameters: slew (rate or time), lag (one-pole), hold (sample on a clock source's edge), edge (pulse of a set width), follower (rectify and two-rate slew), delay (a short line), switch (N inputs stepped by a clock), probability (a hold compared against a threshold). Appended to the shared source list, two or four per layer. - The RTL cost is one word of state per instance, which is the point. ## Open Whether the modes are one enum on one kind, or separate kinds; how a clock input names its edge.
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bcox/tymbal#160
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